Computing devices (e.g., desktop and portable computers, mobile phones, PDAs, tablets and the like) have become increasingly powerful with increasing needs for memory capabilities. Memory can be classified as either volatile or non-volatile. Volatile memory requires constant power to maintain stored information. The most common type of memory found in computers is volatile Random Access Memory (RAM). Important features of volatile RAM include fast read/write speeds and easy re-write capability. To store information on conventional volatile RAM requires electricity flowing through the RAM. When system power is switched off, any information not copied to a hard drive is lost.
By contrast, non-volatile memory does not require a constant power supply. Thus, even when system power is off, the stored information in non-volatile memory is retained. Examples of non-volatile memory include non-volatile RAM and non-volatile Read Only Memory (ROM). Flash memory is a common type of ROM often used in thumb drives and MP3 players. Although non-volatile memories have the advantage of maintaining content without having power applied, they in general have lower read/write speeds and a relatively limited lifetime in comparison to volatile memories.
An emerging type of non-volatile memory is Magnetoresistive Random Access Memory (MRAM). MRAM combines a magnetic device with standard silicon-based microelectronics to obtain the combined attributes of non-volatility, high-speed read/write operations, unlimited read/write endurance and data retention, and low cell leakage. Unlike other types of RAM, data in MRAM is stored as magnetic storage elements instead of electric charges. Each MRAM cell includes a transistor, a Magnetic Tunnel Junction (MTJ) device for data storage, a bit line, a digit line and a word line. Data is read as the resistance of the MTJ tunnel junctions. Using a magnetic state for storage has two main benefits. First, the magnetic polarization does not leak away with time like charge does, so the information is stored even when system power is turned off. Second, switching the magnetic polarization between the two states has no known wear-out mechanism.
The MTJ of a conventional MRAM includes a fixed magnetic layer, a thin dielectric tunnel barrier and a free magnetic layer. The MTJ has a low resistance when the magnetic moment of the free layer is parallel to the fixed, layer, and a high resistance when the free layer moment is oriented anti-parallel to the fixed layer moment. This change in resistance with the magnetic state of the device is an effect known as magnetoresistance, hence the name “Magnetoresistive” RAM. The MRAM can be read by measuring the electrical resistance of the MTJ. For example, a particular MTJ can be selected for a read operation by activating its associated word line transistor, which switches current from a bit line through the MTJ. Due to the tunnel magnetoresistive effect, the electrical resistance of the MTJ changes based on the orientation of the polarities in the two magnetic layers. The resistance inside any particular MTJ can be determined from the current resulting from the polarity of the free layer. Conventionally, if the fixed layer and free layer have the same polarity, the resistance is low and a “0” is read. If the fixed layer and free layer have opposite polarity, the resistance is higher and a “1” is read. The write operation of a conventional MRAM is a magnetic operation. Accordingly, the word line transistor is off during the write operation. Current is propagated through the bit line and digit line to establish magnetic fields that can affect the polarity of the free layer of the MTJ and consequently the logic state of the MRAM.
Unlike conventional MRAM, Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) uses electrons that become spin-polarized as the electrons pass through a thin film (spin filter). STT-MRAM is also known as Spin Transfer Torque RAM (STT-RAM), Spin Torque Transfer Magnetization Switching RAM (Spin-RAM), and Spin Momentum Transfer (SMT-RAM). During the write operation, the spin-polarized electrons exert a torque on the free layer, which can switch the polarity of the free layer. The read operation is similar to conventional MRAM in that a current is used to detect the resistance/logic state of the MTJ storage element, as previously described. For a typical STT-MRAM, the ceil includes an MTJ, a transistor, a bit line and a word line. The word line is coupled to the transistor gate to switch the transistor on for both read and write operations, thereby allowing current to flow through the MTJ so a logic state can be read or written. Read/write circuitry generates a write voltage between the bit line and the source line. Depending on the polarity of the voltage between the bit line and the source line, the polarity of the free layer of the MTJ can be changed and correspondingly a logic state can be written to the MRAM cell. Likewise, during a read operation, a read current is generated, which flows between the bit line and the source line through the MTJ. When the word line transistor is activated, to permit current to flow, the resistance (logic state) of the MTJ can be determined based on the voltage differential between the bit line and the source line.
The electrical write operation of STT-MRAM eliminates the scaling problem due to the magnetic write operation in MRAM. Further, the circuit design is less complicated for STT-MRAM. However, fluctuations in the core operating voltage Vdd can cause cell read current to approach or be higher than the write current threshold, and thus cause an invalid write operation and/or potential damage to system components. Inversely, fluctuations in Vdd can drive the operating voltage down to an undesirably low level that can decrease system performance and potentially prevent the system from functioning properly or at all. These and other problems are addressed by the following issued U.S. patents and published patent application, which are owned by the assignee of the present disclosure: U.S. Pat. Nos. 7,742,329; 8,107,280; 8,004,880; 8,027,206; 8,159,864; and published U.S. Patent Application No. 2009-G1G3354-A1. The above-described patents and published patent application are incorporated herein by reference in their entirety.
In particular, U.S. Pat. No. 7,742,329 (the '329 patent) addresses the problem of invalid read/write operations due to confusing a read voltage applied to the word line with a write voltage applied to the word line. The '329 patent addresses this issue by having a first voltage supplied to the word line transistor for write operations, and a second voltage, which is less than the first voltage, supplied to the word line transistor during read operations.
Important design goals for integrated circuits include reducing the number, size and cost of the elements used to perform a given task. Performing tasks with fewer and less expensive elements decreases cost and reduces the die-size of the integrated circuit. Accordingly, it is desirable to provide circuits, systems and methods that provide different power levels to a word line of an MRAM while optimizing the size and cost of the MRAM cell.